| Manufacturer | Part # | Datasheet | Description |
Cypress Semiconductor
|
CY7C1246KV18 |
913Kb/28P |
36-Mbit DDR II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) |
| CY22150 |
389Kb/16P |
One-PLL General-Purpose Flash-Programmable and 2-Wire Serially Programmable Clock Generator |
| CY7C1370DV25 |
774Kb/30P |
18-Mbit (512 K 횞 36/1 M 횞 18) Pipelined SRAM with NoBL??Architecture |
| S29JL064J |
725Kb/60P |
64-Mbit (8M 횞 8-Bit/4M 횞 16-Bit), 3 V,Simultaneous Read/Write Flash |
| CY7C1061G |
563Kb/18P |
16-Mbit (1 M words 횞 16 bit) Static RAM with Error-Correcting Code (ECC) |
| CY7C1372D |
968Kb/31P |
18-Mbit (512 K 횞 36/1 M 횞 18) Pipelined SRAM with NoBL??Architecture |
| S34MS01G1 |
1Mb/71P |
1-bit ECC, x8 and x16 I/O, 1.8V VCC SLC NAND Flash for Embedded |
| CY7C09089V |
663Kb/28P |
3.3 V 32 K/64 K/128 K 횞 8/9 Synchronous Dual-Port Static RAM |
| CY7S1049G |
593Kb/21P |
4-Mbit (512K words 횞 8 bit) Static RAM with PowerSnooze??and Error Correcting Code (ECC) |
| CY7C1011G |
578Kb/17P |
2-Mbit (128K words 횞 16 bit) Static RAM with Error-Correcting Code (ECC) |
| CY7C1568XV18 |
450Kb/27P |
72-Mbit DDR II+ Xtreme SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) |
| CY7C2540KV18 |
835Kb/26P |
72-Mbit QDR짰II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) with ODT |
| S34MS08G2 |
403Kb/17P |
8 Gb, 4-Bit ECC, x8 I/O and 1.8 V VCC NAND Flash Memory for Embedded |
| CY7C1371D |
1Mb/37P |
18-Mbit (512 K 횞 36/1 M 횞 18) Flow-Through SRAM with NoBL??Architecture |
| CY29948 |
386Kb/10P |
2.5 V or 3.3 V, 200-MHz, 1:12 Clock Distribution Buffer LVCMOS-/LVTTL-compatible inputs |
| CY29940 |
392Kb/10P |
2.5 V or 3.3 V, 200-MHz, 1:18 Clock Distribution Buffer 200-MHz clock support |
| CY29946 |
402Kb/9P |
2.5 V or 3.3 V, 200-MHz, 1:10 Clock Distribution Buffer 200-MHz clock support |
| S29GL01GP |
910Kb/82P |
1 Gbit, 512, 256, 128 Mbit, 3 V, Page Flash with 90 nm MirrorBit Process Technology |
| S34ML08G2 |
529Kb/16P |
8 Gb, 4-bit ECC, x8 I/O and 3 V VCC NAND Flash Memory for Embedded |
| CY7C1510KV18 |
920Kb/33P |
72-Mbit QDR II SRAM 2-Word Burst Architecture Two-word burst on all accesses |
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