DSP56857 datasheet(537/662 Pages) FREESCALE

537 / 662 page

Application:

Date:

Programmer:

Sheet

Appendix B - Programmer’s Sheets, Rev. 4

Freescale Semiconductor

B-35

15 of 24

ITCN

Interrupt Priority Register 8 (IPR8)

Bits

Name

Description

9 - 8

SCI1_RCV IPL

SCI1 Receiver Full interrupt Priority Level

This bit field is used to set the interrupt priority levels for this peripheral IRQ. These IRQs are limited

to priorities 0-2 and are disabled by default.

IRQ disabled by default

IRQ is priority level 0

IRQ is priority level 1

IRQ is priority level 2

7 - 6

SCI1_RERR IPL

SCI1 Receiver Error Interrupt Priority Level

This bit field is used to set the interrupt priority levels for this peripheral IRQ.These IRQs are limited

to priorities 0-2 and are disabled by default.

IRQ disabled by default

IRQ is priority level 0

IRQ is priority level 1

IRQ is priority level 2

5 - 4

SCI1_RIDL IPL

SCI1 Receiver Idle Interrupt Priority Level

This bit field is used to set the interrupt priority levels for this peripheral IRQ. These IRQs are limited

to priorities 0-2 and are disabled by default.

IRQ disabled by default

IRQ is priority level 0

IRQ is priority level 1

IRQ is priority level 2

Interrupt Priority

$1FFF20 + $8

Bits

Read

SCI1_RCV

IPL

SCI1_RERR

IPL

SCI1_RIDL

IPL

SCI1_TIDL

IPL

SCI1_XMIT

IPL

Write

Reset

000

0000

denotes Reserved Bits

See the following page for continuation of this register

DSP56857 Datasheet(PDF) 537 Page - Freescale Semiconductor, Inc

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