DSP56857 datasheet(546/662 Pages) FREESCALE

546 / 662 page

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Date:

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Sheet

5685X Digital Signal Controller User Manual, Rev. 4

B-44

Freescale Semiconductor

Bits

Name

Description

IRQB_STATE

State of IRQB

This bit reflects the state of the external IRQB

IRQA_STATE

State of IRQA

This bit reflects the state of the external IRQA

IRQB_EDG

IRQB Edge

This bit controls whether the externalIRQB interrupt is edge or level sensitive. Automatically level

sensitive during Stop and Wait modes.

IRQB interrupt is level sensitive (default)

IRQB interrupt is falling edge sensitive

IRQA_EDG

IRQA Edge

This bit controls whether the external IRQA interrupt is edge or level sensitive. Automatically level

sensitive during Stop and Wait modes.

0IRQA interrupt is low level sensitive (default)

1IRQA interrupt is falling edge sensitive

24 of 24

ITCN

Interrupt Control Register (ICTL) continued

IRQ Control

$1FFF20 + $1A

Bits

15 14 13 12 11 10 9

Read INT

IPLC

VAB

INT_DIS

0 IRQB_STATE IRQA_STATE

IRQB_EDG IRQA_ EDG

Write

Reset

denotes Reserved Bits

DSP56857 Datasheet(PDF) 546 Page - Freescale Semiconductor, Inc

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