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PIC18F4520E/MLQTP Datasheet(PDF) 339 Page - Microchip Technology |
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PIC18F4520E/MLQTP Datasheet(HTML) 339 Page - Microchip Technology |
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339 / 390 page ![]() 2004 Microchip Technology Inc. Preliminary DS39631A-page 337 PIC18F2420/2520/4420/4520 TABLE 26-1: MEMORY PROGRAMMING REQUIREMENTS DC CHARACTERISTICS Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for industrial Param No. Sym Characteristic Min Typ† Max Units Conditions Internal Program Memory Programming Specifications(1) D110 VPP Voltage on MCLR/VPP/RE3 pin 9.00 — 13.25 V (Note 3) D113 IDDP Supply Current during Programming —— 10 mA Data EEPROM Memory D120 ED Byte Endurance 100K 1M — E/W -40 °C to +85°C D121 VDRW VDD for Read/Write VMIN — 5.5 V Using EECON to read/write VMIN = Minimum operating voltage D122 TDEW Erase/Write Cycle Time — 4 — ms D123 TRETD Characteristic Retention 40 — — Year Provided no other specifications are violated D124 TREF Number of Total Erase/Write Cycles before Refresh(2) 1M 10M — E/W -40°C to +85°C Program Flash Memory D130 EP Cell Endurance 10K 100K — E/W -40 °C to +85°C D131 VPR VDD for Read VMIN — 5.5 V VMIN = Minimum operating voltage D132 VIE VDD for Block Erase 4.5 — 5.5 V Using ICSP port D132A VIW VDD for Externally Timed Erase or Write 4.5 — 5.5 V Using ICSP port D132B VPEW VDD for Self-timed Write VMIN — 5.5 V VMIN = Minimum operating voltage D133 TIE ICSP Block Erase Cycle Time — 4 — ms VDD > 4.5V D133A TIW ICSP Erase or Write Cycle Time (externally timed) 1— — ms VDD > 4.5V D133A TIW Self-timed Write Cycle Time — 2 — ms D134 TRETD Characteristic Retention 40 100 — Year Provided no other specifications are violated † Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: These specifications are for programming the on-chip program memory through the use of table write instructions. 2: Refer to Section 7.8 “Using the Data EEPROM” for a more detailed discussion on data EEPROM endurance. 3: Required only if single-supply programming is disabled. |
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