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PIC18F4520E/MLQTP Datasheet(PDF) 101 Page - Microchip Technology |
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PIC18F4520E/MLQTP Datasheet(HTML) 101 Page - Microchip Technology |
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101 / 390 page  2004 Microchip Technology Inc. Preliminary DS39631A-page 99 PIC18F2420/2520/4420/4520 REGISTER 9-7: PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2 R/W-0 R/W-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 OSCFIE CMIE — EEIE BCLIE HLVDIE TMR3IE CCP2IE bit 7 bit 0 bit 7 OSCFIE: Oscillator Fail Interrupt Enable bit 1 = Enabled 0 =Disabled bit 6 CMIE: Comparator Interrupt Enable bit 1 = Enabled 0 =Disabled bit 5 Unimplemented: Read as ‘0’ bit 4 EEIE: Data EEPROM/Flash Write Operation Interrupt Enable bit 1 = Enabled 0 =Disabled bit 3 BCLIE: Bus Collision Interrupt Enable bit 1 = Enabled 0 =Disabled bit 2 HLVDIE: High/Low-Voltage Detect Interrupt Enable bit 1 = Enabled 0 =Disabled bit 1 TMR3IE: TMR3 Overflow Interrupt Enable bit 1 = Enabled 0 =Disabled bit 0 CCP2IE: CCP2 Interrupt Enable bit 1 = Enabled 0 =Disabled Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown |
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