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AR8327-AL1A-R Datasheet(PDF) 349 Page - List of Unclassifed Manufacturers |
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AR8327-AL1A-R Datasheet(HTML) 349 Page - List of Unclassifed Manufacturers |
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349 / 394 page ![]() Atheros Communications, Inc. AR8327/AR8327N Seven-port Gigabit Ethernet Switch • 349 14 Ack Mode RO Must be 0 HW Rst Always 0 SW Rst Always 0 13 Remote Fault Mode R/W 1 = Set Remote Fault bit 0 = Do not set Remote Fault bit HW Rst Always 0 SW Rst Always 0 12 Reserved Mode RO Always 0. HW Rst Always 0 SW Rst Always 0 11 Asymmetric Pause Mode R/W The value of this bit will be updated immediately after writing this register. But the value written to this bit does not takes effect until any one of the following occurs: o Software reset is asserted (register 0.15) o Restart Auto-Negotiation is asserted (register 0.9) o Power down (register 0.11) transitions from power down to normal operation o Link goes down 1 = Asymmetric Pause 0 = No asymmetric Pause (this bit has added the pad control and can be set from the F001 top, its default value is one) HW Rst 1 SW Rst Update 10 PAUSE Mode R/W The value of this bit will be updated immediately after writing this register. But the value written to this bit does not takes effect until any one of the following occurs: o Software reset is asserted (register 0.15) o Restart Auto-Negotiation is asserted (register 0.9) o Power down (register 0.11) transitions from power down to normal operation o Link goes down 1 = MAC PAUSE implemented 0 = MAC PAUSE not implemented (this bit has added the pad control and can be set from the F001 top, its default value is one) HW Rst 1 SW Rst Update 9 100Base-T4 Mode RO Not able to perform 100BASE-T4 HW Rst Always 0 SW Rst Always 0 8 100Base -TX Mode R/W The value of this bit will be updated immediately after writing this register. But the value written to this bit does not takes effect until any one of the following occurs: o Software reset is asserted (register 0.15) o Restart Auto-Negotiation is asserted (register 0.9) o Power down (register 0.11) transitions from power down to normal operation o Link goes down 1 = Advertise 0 = Not advertised HW Rst 1 SW Rst Update Bit Symbol Type Description |
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