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AR8327-AL1A-R Datasheet(PDF) 360 Page - List of Unclassifed Manufacturers |
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AR8327-AL1A-R Datasheet(HTML) 360 Page - List of Unclassifed Manufacturers |
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360 / 394 page  360 • AR8327/AR8327N Seven-port Gigabit Ethernet Switch Atheros Communications, Inc. 360 • June 2011 COMPANY CONFIDENTIAL 3.10.17 Interrupt Enable Register Address Offset: 0x12, or 0d18 Table 3-382, “Interrupt Enable Register,” on page 361 summarizes the Register Table 3-382. Interrupt Enable Register 6MDI Crossover Status Mode RO This status bit is valid only when Auto-Negotiation is completed or Auto-Negotiation is disabled. 1 = MDIX 0 = MDI HW Rst 0 SW Rst Retain 5 Wirespeed downgrade Mode RO 1 = Downgrade 0 = No Downgrade HW Rst 0 SW Rst 0 4 Reserved Mode RO Always 0 HW Rst 0 SW Rst 0 3 Transmit Pause Enabled Mode RO This is a reflection of the MAC pause resolution. This bit is for information purposes and is not used by the device. This status bit is valid only when Auto-Negotiation is completed or Auto-Negotiation is disabled. 1 = Transmit pause enabled 0 = Transmit pause disabled HW Rst 0 SW Rst 0 2 Receive Pause Enabled Mode RO This is a reflection of the MAC pause resolution. This bit is for information purposes and is not used by the device. This status bit is valid only when Auto-Negotiation is completed or Auto-Negotiation is disabled. 1 = Receive pause enabled 0 = Receive pause disabled HW Rst 0 SW Rst Retain 1 Polarity (Real Time) Mode RO 1 = Reversed 0 = Normal HW Rst 0 SW Rst 0 0 Jabber (Real Time) Mode RO 1 = Jabber 0 = No jabber HW Rst 0 SW Rst Retain Bit Symbol Type Description Bit Symbol Type Description 15 Auto-Negotiation Error Interrupt Enable Mode R/W 1 = Interrupt enable 0 = Interrupt disable HW Rst 0 SW Rst Retain |
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