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AR8327-AL1A-R Datasheet(PDF) 367 Page - List of Unclassifed Manufacturers

Part # AR8327-AL1A-R
Description  Seven-port Gigabit Ethernet Switch
PDF  394 Pages
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Manufacturer  ETC2 [List of Unclassifed Manufacturers]
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AR8327-AL1A-R Datasheet(HTML) 367 Page - List of Unclassifed Manufacturers

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Atheros Communications, Inc.
AR8327/AR8327N Seven-port Gigabit Ethernet
Switch
•
367
Table 3-389.
Debug Port 2 (R/W Port)
3.10.25 Debug Register — Analog Test
Control
Address Offset: 0x00, or 0d00
Table 3-390 summarizes the Register
Table 3-390.
Debug Register — Analog Test Control
Bit
Symbol
Type
Description
15:0
Debug Data Port
Mode
R/W
The data port of debug register.
Before access this register, must set the address offset
first.
HW Rst
0
SW Rst
0
Bit
Symbol
Type
Description
15
SEL_CLK125M_
DSP
Mode
R/W
Control bit for RGMII interface Rx clock delay:
1 = RGMII Rx clock delay enable
0 = RGMII Rx clock delay disable
HW Rst
1
SW Rst
0
14:12
RESERVED
Mode
R/W
Reserved
HW Rst
0
SW Rst
Retain
11
RESERVED
Mode
R/W
Reserved
HW Rst
0
SW Rst
0
10
RESERVED
Mode
R/W
Reserved
HW Rst
0
SW Rst
Retain
9RESERVED
Mode
R/W
Reserved
HW Rst
1
SW Rst
Retain
8RESERVED
Mode
R/W
Reserved
HW Rst
0
SW Rst
Retain
7:5
RESERVED
Mode
R/W
Reserved
HW Rst
1
SW Rst
Retain
4:3
RESERVED
Mode
R/W
Reserved
HW Rst
2’h1
SW Rst
Retain



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