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PIC12F635E/P Datasheet(PDF) 104 Page - Microchip Technology

Part # PIC12F635E/P
Description  8/14-PIN FLASH-BASED, 8-BIT CMOS MICROCONTROLLERS WITH NANOWATT TECHNOLOGY
PDF  196 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC12F635E/P Datasheet(HTML) 104 Page - Microchip Technology

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PIC12F635/PIC16F636/639
DS41232B-page 102
Preliminary
© 2005 Microchip Technology Inc.
FIGURE 11-18:
SPI READ SEQUENCE
CS
LFDATA/RSSI/
CCLK/SDIO
TSU THD
TSCCS
THI
TLO
1/FSCLK
TCS1
TCSH
TCS0
SDI
(input)
SCLK
(input)
ALERT
(output)
LFDATA
(output)
16 Clocks for Read Command,
TCSSC
TCSSC TCS1
TCSH
TCS0
SDO
SCLK
(input)
ALERT
(output)
LFDATA
(output)
16 Clocks for Read Result
(output)
SCLK/ALERT
ALERT
LFDATA
(output)
(output)
1
2
3
4
5
6
7
8
9
10
TDO
MSb
LSb
TCSSC
Address and Dummy Data
MCU SPI Read Details:
1.
Drive the AFE’s open collector ALERT output low.
•
To ensure no false clocks occur when CS drops.
2.
Drop CS
•
AFE SCLK/ALERT becomes SCLK input.
•
LFDATA/RSSI/CCLK/SDIO becomes SDI input.
3.
Change LFDATA/RSSI/CCLK/SDIO connected pin to output.
•
Driving SPI data.
4.
Clock in 16-bit SPI Read sequence.
•
Command, address and dummy data.
5.
Change LFDATA/RSSI/CCLK/SDIO connected pin to input.
6.
Raise CS to complete the SPI Read entry of command and address.
7.
Drop CS.
•
AFE SCLK/ALERT becomes SCLK input.
•
LFDATA/RSSI/CCLK/SDIO becomes SDO output.
8.
Clock out 16-bit SPI Read result.
•
First seven bits clocked-out are dummy bits.
•
Next eight bits are the Configuration register data.
•
The last bit is the Configuration register row parity bit.
9.
Raise CS to complete the SPI Read.
10.
Change SCLK/ALERT back to input.
Note:
The TCSH is considered as one clock. Therefore, the
Configuration register data appears at 6th clock after TCSH.



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