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PIC12F635E/P Datasheet(PDF) 194 Page - Microchip Technology |
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PIC12F635E/P Datasheet(HTML) 194 Page - Microchip Technology |
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194 / 196 page ![]() PIC12F635/PIC16F636/639 DS41232B-page 192 Preliminary © 2005 Microchip Technology Inc. WDA (Weak Pull-up/Pull-down PORTA)..................... 40 WDTCON (Watchdog Timer Control)........................ 126 WPUDA (Weak Pull-up/Pull-down Direction PORTA). 40 Reset................................................................................. 113 Revision History ................................................................ 187 S Software Simulator (MPLAB SIM)..................................... 142 Software Simulator (MPLAB SIM30)................................. 142 Special Function Registers (SFR)....................................... 12 Maps PIC12F635.......................................................... 13 PIC16F636/639 ................................................... 14 Summary PIC12F635, Bank 0............................................. 15 PIC12F635, Bank 1............................................. 16 PIC12F635/PIC16F636/639, Bank 2 .................. 19 PIC16F636/639, Bank 0...................................... 17 PIC16F636/639, Bank 1...................................... 18 SPI Timing Analog Front-End (AFE) for PIC16F639 ................... 171 Status Register IRP Bit ......................................................................... 20 RP Bits ........................................................................ 20 T Time-out Sequence........................................................... 116 Timer0 ................................................................................. 53 Associated Registers .................................................. 55 Interrupt....................................................................... 53 Operation .................................................................... 53 T0CKI .......................................................................... 54 Using with External Clock ........................................... 54 Timer0 and Timer1 External Clock Requirements ................................... 166 Timer1 ................................................................................. 57 Associated Registers .................................................. 60 Asynchronous Counter Mode ..................................... 60 Reading and Writing ........................................... 60 Interrupt....................................................................... 58 Modes of Operations................................................... 58 Operation During Sleep .............................................. 60 Oscillator ..................................................................... 60 Prescaler ..................................................................... 58 Timer1 Gate Inverting Gate ..................................................... 58 Selecting Source ........................................... 58, 67 Synchronizing C2OUT w/ Timer1 ....................... 67 TMR1H Register ......................................................... 57 TMR1L Register .......................................................... 57 Timing Diagrams Brown-out Detect (BOD) ........................................... 165 Brown-out Detect Situations ..................................... 115 CLKOUT and I/O....................................................... 163 External Clock ........................................................... 162 Fail-Safe Clock Monitor (FSCM) ................................. 37 INT Pin Interrupt........................................................ 123 Reset, Watchdog Timer, Oscillator Start-up Timer and Power-up Timer ................................................ 164 Single Comparator ...................................................... 62 Time-out Sequence on Power-up (Delayed MCLR) . 118 Time-out Sequence on Power-up (MCLR with VDD). 118 Timer0 and Timer1 External Clock ........................... 166 Timer1 Incrementing Edge.......................................... 58 Two-Speed Start-up .................................................... 36 Wake-up from Sleep through Interrupt...................... 128 Timing Parameter Symbology .......................................... 161 TRISA ................................................................................. 39 Two-Speed Clock Start-up Mode........................................ 35 U Ultra Low-Power Wake-up .................................. 9, 10, 39, 43 V Voltage Reference. See Comparator Voltage Reference (CVREF). W Wake-up from Sleep ......................................................... 127 Wake-up Reset (WUR) ..................................................... 114 Wake-up using Interrupts.................................................. 127 Watchdog Timer (WDT).................................................... 125 Associated Registers ................................................ 126 Control ...................................................................... 125 Oscillator................................................................... 125 Specifications ........................................................... 165 WWW Address ................................................................. 185 WWW, On-Line Support ....................................................... 3 |
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