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LPC47M14X Datasheet(PDF) 197 Page - SMSC Corporation |
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LPC47M14X Datasheet(HTML) 197 Page - SMSC Corporation |
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197 / 205 page  SMSC DS – LPC47M14X Page 197 Rev. 03/19/2001 t2 t1 PCI_CLK SER_IRQ FIGURE 39 – SETUP AND HOLD TIME NAME DESCRIPTION MIN TYP MAX UNITS t1 SER_IRQ Setup Time to PCI_CLK Rising 7 nsec t2 SER_IRQ Hold Time to PCI_CLK Rising 0 nsec Data (5-8 Bits) t1 Data TXD1, 2 Start Parity Stop (1-2 Bits) FIGURE 40 – SERIAL PORT DATA NAME DESCRIPTION MIN TYP MAX UNITS t1 Serial Port Data Bit Time tBR 1 nsec Note 1: tBR is 1/Baud Rate. The Baud Rate is programmed through the divisor latch registers. Baud Rates have percentage errors indicated in the “Baud Rate” table in the “Serial Port” section. J1X, J1Y, J2X, J2Y 2 3 VREF t1 VREF +/- 5% FIGURE 41 – JOYSTICK POSITION SIGNAL NAME DESCRIPTION MIN TYP MAX UNITS t1 Rise Time to 2/3 VREF 20 µsec J1B1, J1B2, J2B1, J2B2 t1 t2 90% 10% 90% 10% FIGURE 42 – JOYSTICK BUTTON SIGNAL NAME DESCRIPTION MIN TYP MAX UNITS t1, t2 Button Fall/Rise Time 10 µsec |
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