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STM32L4P5CE Datasheet(PDF) 252 Page - STMicroelectronics

Part # STM32L4P5CE
Description  Ultra-low-power Arm®Cortex®-M4 32-bit MCUFPU, 150 DMIPS, up to 1-MB Flash memory, 320-KB SRAM, LCD-TFT, ext. SMPS
PDF  310 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L4P5CE Datasheet(HTML) 252 Page - STMicroelectronics

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Electrical characteristics
STM32L4P5xx
252/310
DS12903 Rev1
Table 105. Asynchronous multiplexed PSRAM/NOR read timings(1)
1. Guaranteed by characterization results.
Symbol
Parameter
Min
Max
Unit
tw(NE)
FMC_NE low time
4THCLK-0.5
4THCLK+1
ns
tv(NOE_NE) FMC_NEx low to FMC_NOE low
2THCLK-0.5
2THCLK+1
tw(NOE)
FMC_NOE low time
THCLK-0.5
THCLK+0.5
th(NE_NOE) FMC_NOE high to FMC_NE high hold time
THCLK-1
-
tv(A_NE)
FMC_NEx low to FMC_A valid
-
3
tv(NADV_NE) FMC_NEx low to FMC_NADV low
0.5
1.5
tw(NADV)
FMC_NADV low time
THCLK
THCLK+1.5
th(AD_NADV)
FMC_AD(address) valid hold time after
FMC_NADV high
THCLK-3
-
th(A_NOE)
Address hold time after FMC_NOE high
Address
holded until
next read
operation
-
tsu(Data_NE) Data to FMC_NEx high setup time
THCLK+14
-
tsu(Data_NOE) Data to FMC_NOE high setup time
14
-
th(Data_NE) Data hold time after FMC_NEx high
0
-
th(Data_NOE) Data hold time after FMC_NOE high
0
-
Table 106. Asynchronous multiplexed PSRAM/NOR read-NWAIT timings(1)
1. Guaranteed by characterization results.
Symbol
Parameter
Min
Max
Unit
tw(NE)
FMC_NE low time
8THCLK-0.5 9THCLK+ 1
ns
tw(NOE)
FMC_NOE low time
5THCLK-0.5
6THCLK+1
tsu(NWAIT_NE)
FMC_NWAIT valid before FMC_NEx high
5THCLK+12
-
th(NE_NWAIT)
FMC_NEx hold time after FMC_NWAIT invalid
4THCLK+11
-



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