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VSC7440 Datasheet(PDF) 246 Page - Microsemi Corporation

Part # VSC7440
Description  L2/L3 Enterprise Gigabit Ethernet Switch with 10 Gbps Links
PDF  444 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

VSC7440 Datasheet(HTML) 246 Page - Microsemi Corporation

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Functional Descriptions
VMDS-10492 VSC7440 Datasheet Revision 4.2
229
3.24.8
Queue System Initialization
The queue system automatically initializes all tables and data structures when setting
RAM_CTRL.RAM_ENA to 1, followed by setting RAM_CTRL.RAM_INIT to 1. Software should
afterwards wait for 150 µs or wait for the RAM_INIT bit to be cleared by hardware. After that the
RESET_CFG.CORE_ENA must be raised, and the queue system is ready to operate. All thresholds and
queue mappings are prepared with operational values. Configuration can afterwards be modified. The
only per-port setting required to change in the queue system for initial bring-up of the queue system is
the SWITCH_PORT_MODE.PORT_ENA, which must be set to one allowing switching of frames to and
from the port.
3.24.9
Miscellaneous Features
This section provides information about other miscellaneous features of the queue system.
3.24.9.1 Frame Aging
The queue system supports discarding of frames pending in the queue system for too long time. This is
known as frame aging. The frame aging period is configured in FRM_AGING.MAX_AGE, which controls
the generation of a periodical aging tick.
The packet memory manager marks frames pending in the queue system when the aging tick occurs.
Frames pending for more than two aging ticks are subject to frame aging and are discarded by the queue
system when scheduled for transmission. As a consequence, frames can be discarded after pending
between one or two aging periods in the queue system.
The following table lists the configuration registers associated with frame aging.
3.24.9.2 Super Priorities
There are two special queues available in each egress port: super priority queue 0 and super priority
queue 1. For more information, see Figure 61, page 220. These queues are selected before any other
queues. They are intended for urgent protocol traffic injected by the CPU system. Frames in super
priority queue 0 disregard the output shaper state and are not counted in the shaper’s buckets. Frames in
super priority queue 1 obey the output shaper state and are counted in the shaper’s buckets.
The following frames can be added to the super priority queues:
•
AFI injected frames: The AFI can be configured to inject into either of the super priority queues. For
more information, see Adding Injection Frame, page 244.
•
CPU injected frames: Frames injected with an IFH with the SP flag set are inserted into the super
priority queue as being set in the drop precedence (DP) IFH field.
•
CPU extracted, mirror, learn all frames: Frames subject to the translation in
QFWD::FRAME_COPY_CFG can configure use of either of the super priority queues.
3.24.9.3 Frame Modifications in the Queue System
The queue system typically passes data completely untouched from the ingress to the egress side,
except for a few special cases.
Frame copies to the CPU can be sent into the rewriter with two different priority schemes, involving
modification of the internal frame header. Either the frame takes the QoS class from the CPU extraction
queue number or it takes the QoS class from the configuration in QFWD::FRAME_COPY_CFG. This is
controlled in PORT_MODE.CPU_PRIO_MODE.
Table 156 •
Frame Aging Registers Overview
Field
Description
Replication
QSYS::FRM_AGING.MAX_AGE
Sets the aging period
None
HSCH::PORT_MODE.AGE_DIS
Disables aging checks per egress port
Per port
HSCH::PORT_MODE.FLUSH_ENA
Regards various frames as being too oldNone



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