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STM32L552CCT3PTR Datasheet(PDF) 169 Page - STMicroelectronics |
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STM32L552CCT3PTR Datasheet(HTML) 169 Page - STMicroelectronics |
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169 / 340 page ![]() Table 49. Typical current consumption in Run and Low-power run modes, with different codes running from Flash, ICACHE ON (2-way) Symbol Parameter Conditions TYP Single Bank Mode TYP Dual Bank Mode Unit TYP Single Bank Mode TYP Dual Bank Mode Unit - Voltage scaling Code 25°C 25°C 25°C 25°C IDD (Run) Supply current in Run mode fHCLK=fHSE up to 48 MHZ included, bypass mode PLL ON above 48 MHz all peripherals disabled Range2 fHCLK=26MHz Reduced code 3.20 3.19 mA 123 123 µA/MHz Coremark 3.43 3.43 132 132 Dhrystone2.1 3.66 3.64 141 140 Fibonacci 3.06 3.05 118 117 While 2.77 2.77 106 106 Range 1 fHCLK=80 MHz Reduced code 11.4 11.4 mA 143 142 µA/MHz Coremark 12.2 12.2 153 153 Dhrystone2.1 13.1 13.0 163 163 Fibonacci 10.8 10.8 135 135 While 9.9 9.9 123 123 Range 0 fHCLK= 110 MHz Reduced code 16.7 16.7 mA 152 152 µA/MHz Coremark 18.0 18.0 163 163 Dhrystone2.1 19.1 19.0 174 173 Fibonacci 15.8 15.8 143 143 While 14.5 14.5 131 131 IDD (LPRun) Supply current in Low-power run fHCLK = fMSI = 2 MHz all peripherals disabled Reduced code 424 403 µA 212 201 µA/MHz Coremark 447 415 224 207 Dhrystone2.1 477 432 239 216 Fibonacci 427 383 214 192 While 350 369 175 185 |
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