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STM32L552CCT3PTR Datasheet(PDF) 174 Page - STMicroelectronics |
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STM32L552CCT3PTR Datasheet(HTML) 174 Page - STMicroelectronics |
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174 / 340 page ![]() Table 54. Typical current consumption in Run mode with internal SMPS, with different codes running from Flash, ICACHE disabled Symbol Parameter Conditions TYP Single Bank Mode TYP Dual Bank Mode Unit TYP Single Bank Mode TYP Dual Bank Mode Unit - Voltage scaling Code 25°C 25°C 25°C 25°C IDD (Run) Supply current in Run mode fHCLK=fHSE up to 48 MHZ included, bypass mode PLL ON above 48 MHz all peripherals disabled Range2, SMPS LP fHCLK=26 MHz Reduced code 2.38 2.41 mA 92 93 µA/MHz Coremark 2.59 2.44 100 94 Dhrystone2.1 2.67 2.55 103 98 Fibonacci 2.13 2.07 82 79 While 1.80 1.86 69 72 Range 1, SMPS HP fHCLK=80 MHz Reduced code 8.7 8.5 mA 109 107 µA/MHz Coremark 8.4 7.5 106 93 Dhrystone2.1 8.6 7.7 107 96 Fibonacci 7.5 7.0 93 87 While 6.8 7.0 84 87 Range 0, SMPS HP fHCLK= 110 MHz Reduced code 12.9 11.6 mA 117 105 µA/MHz Coremark 11.9 10.1 109 92 Dhrystone2.1 12.0 10.4 109 94 Fibonacci 11.3 10.1 102 92 While 10.7 11.1 97 101 |
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