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SH7041A Datasheet(PDF) 433 Page - Renesas Technology Corp |
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SH7041A Datasheet(HTML) 433 Page - Renesas Technology Corp |
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433 / 923 page ![]() 395 12.7.7 Contention between TGR Write and Input Capture If an input capture signal is issued in the T 2 state of the TGR read cycle, input capture has priority, and TGR write does not occur (figure 12.82). TGR Input capture signal TCNT Address Write signal φ T1 T2 TGR write cycle TGR address M M Figure 12.82 TGR Write and Input Capture Contention |
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