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SH7041A Datasheet(PDF) 540 Page - Renesas Technology Corp |
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SH7041A Datasheet(HTML) 540 Page - Renesas Technology Corp |
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540 / 923 page ![]() 502 Table 14.8 Serial Mode Register Settings and SCI Communication Formats SMR Settings SCI Communication Format Mode Bit 7 C/ A Bit 6 CHR Bit 5 PE Bit 2 MP Bit 3 STOP Data Length Parity Bit Multipro- cessor Bit Stop Bit Length Asynchronous 0 0000 8-bit Not set Not set 1 bit 1 2 bits 1 0 Set 1 bit 1 2 bits 1 0 0 7-bit Not set 1 bit 1 2 bits 1 0 Set 1 bit 1 2 bits Asynchronous 0 * 1 0 8-bit Not set Set 1 bit (multiprocessor * 1 2 bits format) 1 * 0 7-bit 1 bit * 1 2 bits Clock synchronous 1 **** 8-bit Not set None Note: Asterisks (*) in the table indicate don’t-care bits. Table 14.9 SMR and SCR Settings and SCI Clock Source Selection SMR SCR Settings SCI Transmit/Receive Clock Mode Bit 7 C/ A Bit 1 CKE1 Bit 0 CKE0 Clock Source SCK Pin Function* Asynchronous 0 0 0 Internal SCI does not use the SCK pin 1 Outputs a clock with frequency matching the bit rate 1 0 External Inputs a clock with frequency 16 times the bit rate 1 Clock synch- 1 0 0 Internal Outputs the synchronous clock ronous 1 1 0 External Inputs the synchronous clock 1 Note: * Select the function in combination with the pin function controller (PFC). |
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