SH7041A datasheet(610/923 Pages) RENESAS

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16.2.2

A/D Control/Status Register (ADCSR0, ADCSR1)

The A/D control/status registers (ADCSR0, 1) are registers that can read/write in 8 bits and control

A/D converter operations such as mode selection. There are the ADCSR0 (A/D0) and ADCSR1

(A/D1).

The ADCSR is initialized to H'00 during power-on reset or standby mode. Manual reset does not

initialize ADCSR.

ADIE

ADF

ADST

SCAN

CKS

—

CH1

CH0

654

000

R/W :

R/(W)*

R/W

Bit :

Initial value :

Note: * Only 0 can be written to clear the flag.

• Bit 7—A/D End Flag (ADF): Status flag that indicates end of A/D conversion.

Bit 7:

ADF

Description

[Clear conditions]

(Initial value)

1. Writing 0 to ADF after reading ADF with ADF=1

2. When registers of the mid-speed converter are accessed after the DMAC and DTC

are activated by ADI interrupt.

[Set conditions]

Single mode: When A/D conversion is complete

Scan mode: When A/D conversion of all designated channels are complete

• Bit 6—A/D Interrupt Enable (ADIE): Enables or disables interrupt request (ADI) due to

completion of A/D conversion.

Bit 6:

ADIE

Description

Disables interrupt request (ADI) due to completion of A/D conversion

(Initial value)

Enables interrupt request (ADI) due to completion of A/D conversion

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