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SH7041A Datasheet(PDF) 182 Page - Renesas Technology Corp

Part # SH7041A
Description  Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)
PDF  923 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7041A Datasheet(HTML) 182 Page - Renesas Technology Corp

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144
Yes
No
Yes
Yes
Yes
Yes
No
No
No
No
Start
Initial settings
DTMR, DTCR, DTIAR, DTSAR, DTDAR
Transfer request
generated?
NMIF = AE = 0?
DTC vector read
Transfer information read
DTCRA = DTCRA – 1 (normal/block transfer mode)
DTCRAL = DTCRAL – 1 (repeat mode)
DTSAR, DTDAR update
DTCRB = DTCRB – 1 (block transfer mode)
Transfer (1 transfer unit)
Block
transfer mode and
DTCRB
≠ 0?
Transfer information write
NMI or address error
End
Transfer information write
CHNE = 0?
NMIF •
NMIM
+ AE = 1?
When DISEL = 1 or DTCRA = 0 (normal/block transfer mode)
When DISEL = 1 (repeat transfer mode)
CPU interrupt request
Figure 8.2 DTC Operation Flowchart



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