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EPL09060 Datasheet(PDF) 10 Page - ELAN Microelectronics Corp

Part # EPL09060
Description  9 COM/ 60 SEG v
PDF  54 Pages
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Manufacturer  EMC [ELAN Microelectronics Corp]
Direct Link  http://www.emc.com.tw
Logo EMC - ELAN Microelectronics Corp

EPL09060 Datasheet(HTML) 10 Page - ELAN Microelectronics Corp

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EPL09060
9 COM/60 SEG LCD Driver
10
Product Specification (V1.0) 12.28.2005
System Control
Name
I/O
Description
P/S
I
Select theInterface mode with the MPU.
When PS = "High": Parallel interface mode
When PS = "Low": Serial interface mode
C86
I
Select the kinds of the MPU to interface.
When C86 = "High": 68-series MPU interface mode
When C86 = "Low": 80-series MPU interface
CLS
I
Internal oscillator circuit enable / disable select pin.
CLS = “H”: Enable the Internal oscillator circuit
CLS = “L”: Disable the Internal oscillator circuit
(External display clock input to the OSC pin)
OSC
I
When using an external oscillator, input the clock to the OSC pin.
When using an internal oscillator, leave this pin open.
IRS
I
Internal resistor select pin.
This pin selects the resistors for adjusting the V0 voltage level and is
available only in master mode.
- IRS = "H": Internal resistors are used.
- IRS = "L": External resistors are used. V0 voltage is controlled using the
external divider resistor connecting the VR pin.
TEST
I
Test pin. Must be fixed at VSS.
MPU Interface
Name
I/O
Description
/RES
I
Hardware reset input
The LSI is reset when this signal is pulled low (Active low)
Chip select signals. The Chip Select of the LSI becomes active when CS1
is "L" and CS2 is "H", which allows input/output of data or commands.
/CS1
CS2
Status
“L”
“L”
The device is not active (D7~D0 is Hi-Z)
“L”
“H”
Data and instruction are available.
“H”
“L”
The device is not active (D7~D0 is Hi-Z)
“H”
“H”
The device is not active (D7~D0 is Hi-Z)
/CS1, CS2
I
A0
I
Used as register selection input
When A0 = "High", Data register
When A0 = "Low", Instruction register
/WR (R/W)
I
When C86 = "High"(68-series MPU interface), used as read (/WR = "High"),
write (/WR = "Low")
When C86 = "Low " (80-series MPU interface), used as write enable input
(/WR)
/RD (E)
I
When C86 = "High"(68-series MPU interface), used as read/write enable
input (E).
When C86 = "Low "(80-series MPU interface), used as read enable input
(/RD)
D0 to D7
I/O
When in serial mode, D6 (SCK) is used as serial clock input pin, D7 (SDI) is
used as serial data input pin, D5 (SDO) is used as serial data output pin and
the others are not used.
When in parallel mode, D0 to D7 are used as bidirectional data bus pin.


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