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STM32H750VB Datasheet(PDF) 268 Page - STMicroelectronics

Part # STM32H750VB
Description  32-bit Arm® Cortex®-M7 480MHz MCUs, 128 Kbyte Flash, 1 Mbyte RAM, 46 com. and analog interfaces, crypto
PDF  337 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32H750VB Datasheet(HTML) 268 Page - STMicroelectronics

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Electrical characteristics (rev V)
STM32H750VB STM32H750ZB STM32H750IB STM32H750XB
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DS12556 Rev 6
Figure 87. Quad-SPI timing diagram - DDR mode
7.3.19
Delay block (DLYB) characteristics
Unless otherwise specified, the parameters given in Table 181 for Delay Block are derived
from tests performed under the ambient temperature, frcc_c_ck frequency and VDD supply
voltage summarized in Table 120: General operating conditions, with the following
configuration:
7.3.20
16-bit ADC characteristics
Unless otherwise specified, the parameters given in Table 182 are derived from tests
performed under the ambient temperature, fPCLK2 frequency and VDDA supply voltage
conditions summarized in Table 120: General operating conditions.
MSv36879V3
Data output
IO0
IO2
IO4
Clock
Data input
IO0
IO2
IO4
t(CLK)
tw(CLKH)
tw(CLKL)
tr(CLK)
tf(CLK)
tsf(IN) thf(IN)
tvf(OUT)
thr(OUT)
IO1
IO3
IO5
IO1
IO3
IO5
tvr(OUT)
thf(OUT)
tsr(IN) thr(IN)
Table 181. Delay Block characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tinit
Initial delay
-
1400
2200
2400
ps
t∆
Unit Delay
-
35
40
45
-
Table 182. ADC characteristics(1)(2)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDDA
Analog supply
voltage for ADC
ON
-1.62
-
3.6
V
VREF+
Positive reference
voltage
-1.62
-
VDDA
V
VREF-
Negative
reference voltage
-VSSA
V
fADC
ADC clock
frequency
1.62 V ≤ VDDA ≤ 3.6 V
BOOST = 11
0.12
-
50
MHz
BOOST = 10
0.12
-
25
BOOST = 01
0.12
-
12.5
BOOST = 00
-
-
6.25



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