| Electronic Components Datasheet Search |
|
STM32H750VB Datasheet(PDF) 301 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM32H750VB Datasheet(HTML) 301 Page - STMicroelectronics |
|
301 / 337 page ![]() DS12556 Rev 6 301/336 STM32H750VB STM32H750ZB STM32H750IB STM32H750XB Electrical characteristics (rev V) 311 Figure 103. I2S master timing diagram (Philips protocol)(1) 1. LSB transmit/receive of the previously transmitted byte. No LSB transmit/receive is sent before the first byte. SAI characteristics Unless otherwise specified, the parameters given in Table 205 for SAI are derived from tests performed under the ambient temperature, fPCLKx frequency and VDD supply voltage conditions summarized in Table 120: General operating conditions, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 10 • Capacitive load CL = 30 pF • IO Compensation cell activated. • Measurement points are done at CMOS levels: 0.5VDD • VOS level set to VOS1. Refer to Section 7.3.15: I/O port characteristics for more details on the input/output alternate function characteristics (SCK,SD,WS). Table 205. SAI characteristics(1) Symbol Parameter Conditions Min Max Unit fMCK SAI Main clock output - 256x8K 256xFS MHz fCK SAI clock frequency(2) Master Data: 32 bits - 128xFS(3) Slave Data: 32 bits - 128xFS(3) |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |