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DS30010118D-page 231

PIC24FJ256GA705 FAMILY

19.1

UARTx Baud Rate Generator (BRG)

The UARTx module includes a dedicated, 16-bit Baud

Rate Generator. The UxBRG register controls the

period of a free-running, 16-bit timer. Equation 19-1

shows the formula for computation of the baud rate

when BRGH = 0.

EQUATION 19-1:

UARTx BAUD RATE WITH

BRGH = 0(1,2)

Example 19-1 shows the calculation of the baud rate

error for the following conditions:

•FCY = 4 MHz

• Desired Baud Rate = 9600

The maximum baud rate (BRGH = 0) possible is

FCY/16 (for UxBRG = 0) and the minimum baud rate

possible is FCY/(16 * 65536).

Equation 19-2 shows the formula for computation of

the baud rate when BRGH = 1.

EQUATION 19-2:

UARTx BAUD RATE WITH

BRGH = 1(1,2)

The maximum baud rate (BRGH = 1) possible is FCY/4

(for UxBRG = 0) and the minimum baud rate possible

is FCY/(4 * 65536).

Writing a new value to the UxBRG register causes the

BRG timer to be reset (cleared). This ensures the BRG

does not wait for a timer overflow before generating the

new baud rate.

EXAMPLE 19-1:

BAUD RATE ERROR CALCULATION (BRGH = 0)(1)

Note 1: FCY denotes the instruction cycle

clock frequency (FOSC/2).

2: Based on FCY = FOSC/2; Doze mode

and PLL are disabled.

Baud Rate =

FCY

16 • (UxBRG + 1)

UxBRG =

FCY

16 • Baud Rate

– 1

Note 1: FCY denotes the instruction cycle

clock frequency.

2: Based on FCY = FOSC/2; Doze mode

and PLL are disabled.

Baud Rate =

FCY

4 • (UxBRG + 1)

UxBRG =

FCY

4 • Baud Rate

– 1

Note 1: Based on FCY = FOSC/2; Doze mode and PLL are disabled.

Desired Baud Rate

= FCY/(16 (UxBRG + 1))

Solving for UxBRG Value:

UxBRG

= ((FCY/Desired Baud Rate)/16) – 1

UxBRG

= ((4000000/9600)/16) – 1

UxBRG

= 25

Calculated Baud Rate = 4000000/(16 (25 + 1))

= 9615

Error

= (Calculated Baud Rate – Desired Baud Rate)/Desired Baud Rate

= (9615 – 9600)/9600

= 0.16%

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