STM32H753II datasheet(165/361 Pages) STMICROELECTRONICS

Part #	STM32H753II

Description	32-bit Arm® Cortex®-M7 480MHz MCUs, 2MB Flash,1MB RAM, 46 com. and analog interfaces, crypto

PDF	361 Pages

Scroll/Zoom	100%

Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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165 / 361 page

DS12117 Rev 8

165/360

STM32H753xI

Electrical characteristics (rev Y)

318

Figure 37. Quad-SPI timing diagram - SDR mode

Figure 38. Quad-SPI timing diagram - DDR mode

Table 84. QUADSPI characteristics in DDR mode(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Fck1/t(CK)

QUADSPI clock

frequency

2.7 V<VDD<3.6 V

CL=20 pF

100

MHz

1.62 V<VDD<3.6 V

CL=15 pF

100

tw(CKH)

QUADSPI clock high and

low time

TCK/2 –0.5

TCK/2

tw(CKL)

TCK/2

TCK/2+0.5

tsr(IN), tsf(IN)

Data input setup time

2.7 V ≤ VDD < 3.6 V

1.62 V ≤ VDD < 3.6 V

thr(IN), thf(IN)

Data input hold time

2.7 V ≤ VDD < 3.6 V

1.62 V ≤ VDD < 3.6 V

1.5

tvr(OUT),

tvf(OUT)

Data output valid time

DHHC=0

3.5

DHHC=1

Pres=1, 2...

-TCK/4+3.5

TCK/4+4

thr(OUT),

thf(OUT)

Data output hold time

DHHC=0

DHHC=1

Pres=1, 2...

TCK/4+3

1. Guaranteed by characterization results.

MSv36878V1

Data output

Clock

Data input

t(CK)

tw(CKH)

tw(CKL)

tr(CK)

tf(CK)

ts(IN)

th(IN)

tv(OUT)

th(OUT)

MSv36879V3

Data output

IO0

IO2

IO4

Clock

Data input

IO0

IO2

IO4

t(CLK)

tw(CLKH)

tw(CLKL)

tr(CLK)

tf(CLK)

tsf(IN) thf(IN)

tvf(OUT)

thr(OUT)

IO1

IO3

IO5

IO1

IO3

IO5

tvr(OUT)

thf(OUT)

tsr(IN) thr(IN)

STM32H753II Datasheet(PDF) 165 Page - STMicroelectronics

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