STM32H753II datasheet(299/361 Pages) STMICROELECTRONICS

299 / 361 page

DS12117 Rev 8

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STM32H753xI

Electrical characteristics (rev V)

318

7.3.31

Timer characteristics

The parameters given in Table 200 are guaranteed by design.

Refer to Section 7.3.15: I/O port characteristics for details on the input/output alternate

function characteristics (output compare, input capture, external clock, PWM output).

7.3.32

Communication interfaces

I2C interface characteristics

The I2C interface meets the timings requirements of the I2C-bus specification and user

manual revision 03 for:

•

Standard-mode (Sm): with a bit rate up to 100 kbit/s

•

Fast-mode (Fm): with a bit rate up to 400 kbit/s

•

Fast-mode Plus (Fm+): with a bit rate up to 1 Mbit/s.

The I2C timings requirements are guaranteed by design when the I2C peripheral is properly

configured (refer to RM0399 reference manual) and when the i2c_ker_ck frequency is

greater than the minimum shown in the table below:

Table 200. TIMx characteristics(1)(2)

1. TIMx is used as a general term to refer to the TIM1 to TIM17 timers.

2. Guaranteed by design.

Symbol

Parameter

Conditions(3)

3. The maximum timer frequency on APB1 or APB2 is up to 240 MHz, by setting the TIMPRE bit in the

RCC_CFGR register, if APBx prescaler is 1 or 2 or 4, then TIMxCLK = rcc_hclk1, otherwise TIMxCLK = 4x

Frcc_pclkx_d2.

Min

Max

Unit

tres(TIM)

Timer resolution time

AHB/APBx prescaler=1

or 2 or 4, fTIMxCLK =

240 MHz

tTIMxCLK

AHB/APBx

prescaler>4, fTIMxCLK =

120 MHz

tTIMxCLK

fEXT

Timer external clock

frequency on CH1 to CH4 f

TIMxCLK = 240 MHz

fTIMxCLK/2

MHz

ResTIM

Timer resolution

16/32

bit

tMAX_COUNT

Maximum possible count

with 32-bit counter

65536 ×

65536

tTIMxCLK

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