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MPC8540 Datasheet(PDF) 227 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 227 Page - Freescale Semiconductor, Inc |
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227 / 1302 page  Instruction Set MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 Freescale Semiconductor 5-13 — BTB locking APU instructions. The core complex provides a 512-entry BTB for efficient processing of branch instructions. The BTB is a branch target address cache, organized as 128 rows with four-way set associativity, that holds the address and target instruction of the 512 most-recently taken branches. Table 5-5 lists BTB instructions. Table 5-4. Scalar and Vector Embedded Floating-Point APU Instructions Instruction Mnemonic Syntax Scalar Vector Convert Floating-Point from Signed Fraction efscfsf evfscfsf rD,rB Convert Floating-Point from Signed Integer efscfsi evfscfsi rD,rB Convert Floating-Point from Unsigned Fraction efscfuf evfscfuf rD,rB Convert Floating-Point from Unsigned Integer efscfui evfscfui rD,rB Convert Floating-Point to Signed Fraction efsctsf evfsctsf rD,rB Convert Floating-Point to Signed Integer efsctsi evfsctsi rD,rB Convert Floating-Point to Signed Integer with Round toward Zero efsctsiz evfsctsiz rD,rB Convert Floating-Point to Unsigned Fraction efsctuf evfsctuf rD,rB Convert Floating-Point to Unsigned Integer efsctui evfsctui rD,rB Convert Floating-Point to Unsigned Integer with Round toward Zero efsctuiz evfsctuiz rD,rB Floating-Point Absolute Value efsabs evfsabs rD,rA Floating-Point Add efsadd evfsadd rD,rA,rB Floating-Point Compare Equal efscmpeq evfscmpeq crD,rA,rB Floating-Point Compare Greater Than efscmpgt evfscmpgt crD,rA,rB Floating-Point Compare Less Than efscmplt evfscmplt crD,rA,rB Floating-Point Divide efsdiv evfsdiv rD,rA,rB Floating-Point Multiply efsmul evfsmul rD,rA,rB Floating-Point Negate efsneg evfsneg rD,rA Floating-Point Negative Absolute Value efsnabs evfsnabs rD,rA Floating-Point Subtract efssub evfssub rD,rA,rB Floating-Point Test Equal efststeq evfststeq crD,rA,rB Floating-Point Test Greater Than efststgt evfststgt crD,rA,rB Floating-Point Test Less Than efststlt evfststlt crD,rA,rB Table 5-5. BTB Locking APU Instructions Name Mnemonic Syntax Branch Buffer Load Entry and Lock Set bblels — Branch Buffer Entry Lock Reset bbelr — |
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