UPSD3422EB40U6 datasheet(212/300 Pages) STMICROELECTRONICS

212 / 300 page

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UPSD3422, UPSD3433, UPSD3434, UPSD3454

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28.5.9

Erase time-out flag (DQ3)

The Erase Time-out Flag Bit (DQ3) reflects the time-out period allowed between two

consecutive sector erase instruction sequence bytes. If multiple sector erase commands are

desired, the additional sector erase commands (30h) must be sent by the 8032 within 80us

after the previous sector erase command. DQ3 is 0 before this time period has expired,

indicating it is OK to issue additional sector erase commands. DQ3 will go to logic ’1’ if the

time has been longer than 80µs since the previous sector erase command (time has

expired), indication that is not OK to send another sector erase command. In this case, the

8032 must start a new sector erase instruction sequence (unlock and command) beginning

again after the current sector erase operation has completed.

28.5.10

Programming Flash memory

When a byte of Flash memory is programmed, individual bits are programmed to logic '0.'

cannot program a bit in Flash memory to a logic ’1’ once it has been programmed to a logic

'0.' A bit must be erased to logic ’1’, and programmed to logic '0.' That means Flash memory

must be erased prior to being programmed. A byte of Flash memory is erased to all 1s

(FFh). The 8032 may erase the entire Flash memory array all at once, or erase individual

sector-by-sector, but not erase byte-by-byte. However, even though the Flash memories

cannot be erased byte-by-byte, the 8032 may program Flash memory byte-by-byte. This

means the 8032 does not need to program group of bytes (64, 128, etc.) at one time, like

some Flash memories.

Each Flash memory requires the 8032 to send an instruction sequence to program a byte or

to erase sectors (see Table 163 on page 209).

If the byte to be programmed is in a protected Flash memory sector, the instruction

sequence is ignored.

Important note: It is mandatory that a chip-select signal is active for the Flash sector where

a programming instruction sequence is targeted. The user must make sure that the correct

chip-select equation, FSx or CSBOOTx specified in PSDsoft Express matches the address

range that the 8032 firmware is accessing, otherwise the instruction sequence will not be

recognized by the Flash array. If memory paging is used, be sure that the 8032 firmware

sets the page register to the correct page number before issuing an instruction sequence to

the Flash memory segment on a particular memory page, otherwise the correct sector

select signal will not become active.

Once the 8032 issues a Flash memory program or erase instruction sequence, it must

check the status bits for completion. The embedded algorithms that are invoked inside a

Flash memory array provide several ways to give status to the 8032. Status may be checked

using any of three methods: Data Polling, Data Toggle, or Ready/Busy (pin PC3).

Table 164.

Flash memory status bit definition(1) (2)

X = Not guaranteed value, can be read either '1' or '0.'

DQ7-DQ0 represent the 8032 data bus bits, D7-D0.

Functional

block

FSx, or CSBOOTx

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

Flash

memory

Active (the desired

segment is selected)

Data

polling

Toggle

flag

Error

flag

Erase

timeout

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UPSD3422EB40U6 Datasheet(PDF) 212 Page - STMicroelectronics

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