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ST72361 Datasheet(PDF) 103 Page - STMicroelectronics |
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ST72361 Datasheet(HTML) 103 Page - STMicroelectronics |
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103 / 224 page ![]() ST72361 103/224 8-BIT TIMER (Cont’d) 10.5.4 Low Power Modes 10.5.5 Interrupts Note: The 8-bit Timer interrupt events are connected to the same interrupt vector (see Interrupts chapter). These events generate an interrupt if the corresponding Enable Control Bit is set and the interrupt mask in the CC register is reset (RIM instruction). 10.5.6 Summary of Timer modes 1) See note 4 in “One Pulse Mode” on page 11 2) See note 5 in “One Pulse Mode” on page 11 3) See note 4 in “Pulse Width Modulation Mode” on page 13 Mode Description WAIT No effect on 8-bit Timer. Timer interrupts cause the device to exit from WAIT mode. HALT 8-bit Timer registers are frozen. In HALT mode, the counter stops counting until Halt mode is exited. Counting resumes from the previous count when the MCU is woken up by an interrupt with “exit from HALT mode” capability or from the counter reset value when the MCU is woken up by a RESET. If an input capture event occurs on the ICAPi pin, the input capture detection circuitry is armed. Consequent- ly, when the MCU is woken up by an interrupt with “exit from HALT mode” capability, the ICFi bit is set, and the counter value present when exiting from HALT mode is captured into the ICiR register. Interrupt Event Event Flag Enable Control Bit Exit from Wait Exit from Halt Input Capture 1 event/Counter reset in PWM mode ICF1 ICIE Yes No Input Capture 2 event ICF2 Output Compare 1 event (not available in PWM mode) OCF1 OCIE Output Compare 2 event (not available in PWM mode) OCF2 Timer Overflow event TOF TOIE MODES AVAILABLE RESOURCES Input Capture 1 Input Capture 2 Output Compare 1 Output Compare 2 Input Capture (1 and/or 2) Yes Yes Yes Yes Output Compare (1 and/or 2) One Pulse Mode No Not Recommended1) No Partially 2) PWM Mode Not Recommended3) No |
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