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ST72361 Datasheet(PDF) 169 Page - STMicroelectronics |
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ST72361 Datasheet(HTML) 169 Page - STMicroelectronics |
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169 / 224 page ![]() ST72361 169/224 10.9 10-BIT A/D CONVERTER (ADC) 10.9.1 Introduction The on-chip Analog to Digital Converter (ADC) pe- ripheral is a 10-bit, successive approximation con- verter with internal sample and hold circuitry. This peripheral has up to 16 multiplexed analog input channels (refer to device pin out description) that allow the peripheral to convert the analog voltage levels from up to 16 different sources. The result of the conversion is stored in a 10-bit Data Register. The A/D converter is controlled through a Control/Status Register. 10.9.2 Main Features ■ 10-bit conversion ■ Up to 16 channels with multiplexed input ■ Linear successive approximation ■ Data register (DR) which contains the results ■ Conversion complete status flag ■ On/off bit (to reduce consumption) The block diagram is shown in Figure 94. 10.9.3 Functional Description 10.9.3.1 Digital A/D Conversion Result The conversion is monotonic, meaning that the re- sult never decreases if the analog input does not and never increases if the analog input does not. If the input voltage (VAIN) is greater than VDDA (high-level voltage reference) then the conversion result is FFh in the ADCDRH register and 03h in the ADCDRL register (without overflow indication). If the input voltage (VAIN) is lower than VSSA (low- level voltage reference) then the conversion result in the ADCDRH and ADCDRL registers is 00 00h. The A/D converter is linear and the digital result of the conversion is stored in the ADCDRH and AD- CDRL registers. The accuracy of the conversion is described in the Electrical Characteristics Section. RAIN is the maximum recommended impedance for an analog input signal. If the impedance is too high, this will result in a loss of accuracy due to leakage and sampling not being completed in the allotted time. Figure 94. ADC Block Diagram CH2 CH1 EOC SPEED ADON SLOW CH0 ADCCSR AIN0 AIN1 ANALOG TO DIGITAL CONVERTER AINx ANALOG MUX D4 D3 D5 D9 D8 D7 D6 D2 ADCDRH 4 fADC fCPU D1 D0 ADCDRL 0 0 00 00 CH3 fCPU, fCPU/2, fCPU/4 |
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