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ST72324B Datasheet(PDF) 144 Page - STMicroelectronics |
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ST72324B Datasheet(HTML) 144 Page - STMicroelectronics |
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144 / 167 page  ST72324B 144/167 ADC CHARACTERISTICS (Cont’d) Figure 80. RAIN max. vs fADC with CAIN=0pF 1) Figure 81. Recommended CAIN & RAIN values. 2) Figure 82. Typical A/D Converter Application Notes: 1. CPARASITIC represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad ca- pacitance (3pF). A high CPARASITIC value will downgrade conversion accuracy. To remedy this, fADC should be reduced. 2. This graph shows that depending on the input signal variation (fAIN), CAIN can be increased for stabilization time and decreased to allow the use of a larger serial resistor (RAIN). 0 5 10 15 20 25 30 35 40 45 010 30 70 CPARASITIC (pF) 2 MHz 1 MHz 0.1 1 10 100 1000 0.01 0.1 1 10 fAIN(KHz) Cain 10 nF Cain 22 nF Cain 47 nF AINx ST72XXX VDD IL ±1 µA VT 0.6V VT 0.6V CADC 12pF VAIN RAIN 10-Bit A/D Conversion 2k Ω(max) CAIN 1 |
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