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TMPR4925 Datasheet(PDF) 101 Page - Toshiba Semiconductor

Part # TMPR4925
Description  64-Bit TX System RISC TX49 Family
PDF  590 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR4925 Datasheet(HTML) 101 Page - Toshiba Semiconductor

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Chapter 5 Configuration Register
5-11
5.2.8
DMA Request Control Register (DRQCTR)
0xE024
31
16
Reserved
: Type
: Initial value
15
12
11
8
7
4
3
0
DMAREQ[3]
DMAREQ[2]
DMAREQ[1]
DMAREQ[0]
R/W
R/W
R/W
R/W
: Type
0x0
0x0
0x0
0x0
: Initial value
Bits
Mnemonic
Field Name
Description
31:16
Reserved
15:12
DMAREQ[3]
DMA Request 3
DMA Request 3 (Initial value: 0x0, R/W)
This field selects the DMA request source of DMAREQ[3].
0xxx: reserved
1000: SIO ch0. Receive
1001: SIO ch1 Receive
1010: SIO ch0. Transmit
1011: SIO ch1 Transmit
1100: ACLC ch0
1101: ACLC ch1
1110: ACLC ch2
1111: ACLC ch3
11:8
DMAREQ[2]
DMA Request 2
DMA Request 2 (Initial value: 0x0, R/W)
This field selects the DMA request source of DMAREQ[2].
0xxx: reserved
1000: SIO ch0. Receive
1001: SIO ch1 Receive
1010: SIO ch0. Transmit
1011: SIO ch1 Transmit
1100: ACLC ch0
1101: ACLC ch1
1110: ACLC ch2
1111: ACLC ch3
7:4
DMAREQ[1]
DMA Request 1
DMA Request 1 (Initial value: 0x0, R/W)
This field selects the DMA request source of DMAREQ[1].
0xxx: DMAREQ[1] (external signal)
1000: SIO ch0. Receive
1001: SIO ch1 Receive
1010: SIO ch0. Transmit
1011: SIO ch1 Transmit
1100: ACLC ch0
1101: ACLC ch1
1110: ACLC ch2
1111: ACLC ch3
3:0
DMAREQ[0]
DMA Request 0
DMA Request 0 (Initial value: 0x0, R/W)
This field selects the DMA request source of DMAREQ[0].
0xxx: DMAREQ[0] (external signal)
1000: SIO ch0. Receive
1001: SIO ch1 Receive
1010: SIO ch0. Transmit
1011: SIO ch1 Transmit
1100: ACLC ch0
1101: ACLC ch1
1110: ACLC ch2
1111: ACLC ch3
Figure 5.2.8 DMA Request Control Register (DRQCTR)



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