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TMPR4925 Datasheet(PDF) 245 Page - Toshiba Semiconductor

Part # TMPR4925
Description  64-Bit TX System RISC TX49 Family
PDF  590 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR4925 Datasheet(HTML) 245 Page - Toshiba Semiconductor

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Chapter 9 SDRAM Controller
9-17
9.4.3
SDRAM Command Register (SDCCMD)
0x802C
31
24
23
16
MDLNO
VERNO
RR
: Type
0x21
0x10
: Initial
value
15
87
43
0
Reserved
CCE
CMD
R/W
R/W
: Type
0x0
0x0
: Initial
value
Bits
Mnemonic
Field Name
Description
31:24
MDLNO
Model Number
Model Number (Initial value: 0x21, R)
Indicates the model number. The default value is 0x30 for the TX4925. This field is
Read Only.
23:16
VERNO
Version Number
Version Number (Initial value: 0x10, R)
Indicates the version number. The default value is 0x10 for the TX4925. This field is
Read Only.
15:8
Reserved
7:4
CCE
Command
Channel Enable
Command Channel Enable (Initial value: 0x0, R/W)
Setting one of these bits to “1” enables the command of the corresponding channel.
This command is simultaneously executed on all channels that are enabled.
Bit 7: Channel 3
Bit 6: Channel 2
Bit 5: Channel 1
Bit 4: Channel 0
3:0
CMD
Command
Command (Initial value: 0x0, R/W)
Specifies a command that is performed on memory.
0x0: NOP command
0x1: Set Mode Register command
Set SDRAM Mode Register from SDCTR value
0x2: Reserved
0x3: Precharge All command
Precharge All SDRAM Banks
0x4: Self-Refresh Mode command
Sets SDRAM to the Self-Refresh Mode
0x5: Power Down Mode Command
Set SDRAM/SyncFlash to the Power Down Mode
0x6: Normal Mode Command
Cancel Self-Refresh/Power Down Mode
0x7: Reserved
0x8: Deep Power Down Mode command for SyncFlash
Sets SyncFlash to the Deep Power Down Mode
0x9: Exit Deep Power Down Mode command for SyncFlash
Cancel Deep Power Down Mode command for SyncFlash
0xa-0xf: Reserved
Figure 9.4.3 SDRAM Command Register



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