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I.MX8XLITE Datasheet(PDF) 31 Page - NXP Semiconductors |
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I.MX8XLITE Datasheet(HTML) 31 Page - NXP Semiconductors |
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31 / 112 page  3.5.1 XTALI and RTC_XTALI (Clock Inputs) Parameters For XTALI and RTC_XTALI, VIH/VIL specifications do not apply. The high and low levels of the applied clock on this pin are not strictly defined, as long as the input’s peak-to-peak amplitude meet the requirements and the input’s voltage value does not exceed the limits. Table 18. XTALI External input clock for OSC24M Parameter Symbol Min Typ Max Units DC offset Vcm - VDD_ANA1_1P 8 / 2 - mV Input signal level p/p 1, 2, 3 VIN 600 - VDD_ANA1_1P 8 mV Duty Cycle 4 - 45 - 55 % 1. The external clock is fed into the chip from the XTALI pin; the XTALO pin should be left floating. 2. The parameter specified here is a peak-to-peak value and VIHIIH/VIL specifications do not apply. 3. The voltage applied on XTALI must be within the range of VSS to VDD_ANA1_1P8. 4. The rise/fall time of the applied clock are not strictly confined. Table 19. External input clock for OSC32K Min Typ Max Unit Notes Frequency — 32.768 or 32 — kHz — VPP RTC_XTALI 700 — VDD_SNVS_LDO_1P8_CAP mV 1, 2, 3 Rise/fall time — — — ns 4 1. The external clock is fed into the chip from the RTC_XTALI pin; the RTC_XTALO pin should be left floating. 2. The parameter specified here is a peak-to-peak value and VIH/VIL specifications do not apply. 3. The voltage applied on RTC_XTALI must be within the range of VSS to VDD_SNVS_LDO_1P8_CAP. 4. The rise/fall time of the applied clock are not strictly confined. 3.5.2 General-purpose I/O (GPIO) DC parameters 3.5.2.1 Dual-voltage GPIO DC parameters The following two tables show dual-voltage 1.8 V and 3.3 V DC parameters, respectively, for GPIO pads. These parameters are guaranteed per the operating ranges in Table 5, unless otherwise noted. Electrical characteristics i.MX 8XLite Industrial Applications Processors, Rev. 3, 08/2023 31 NXP Semiconductors |
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