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I.MX8XLITE Datasheet(PDF) 57 Page - NXP Semiconductors |
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I.MX8XLITE Datasheet(HTML) 57 Page - NXP Semiconductors |
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57 / 112 page ![]() 3.10.1 LPSPI timing parameters All LPSPI interfaces do not have the same maximum serial clock frequency. There are two groups. LPSPI interfaces which can operate at 60 MHz in Master mode and 40 MHz in Slave mode and the other group where interfaces operate at 40 MHz in Master mode and 20 MHz in Slave mode. The same performance is achieved at 1.8 V and 3.3 V unless otherwise stated. Below are the LPSPI interfaces and their respective chip selects: Table 44. LPSPI interfaces and chip selects LPSPI interface Chip select Comment 60 MHz in Master mode and 40 MHz in Slave mode SPI0, SPI2, SPI3 40 MHz in Master mode and 20 MHz in Slave mode SPI1 3.10.1.1 LPSPI Master mode Waveform is assuming LPSPI is configured in mode 0, i.e. TCR.CPOL=0b0 and TCR.CPHA=0b0. Timing parameters are valid for all modes using appropriate edge of the clock. Figure 23. LPSPI Master mode Electrical characteristics i.MX 8XLite Industrial Applications Processors, Rev. 3, 08/2023 57 NXP Semiconductors |
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