I.MX8XLITE datasheet(66/112 Pages) NXP

Part #	I.MX8XLITE

Description	i.MX 8XLite Industrial Applications Processors

PDF	112 Pages

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Manufacturer	NXP [NXP Semiconductors]

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8-bit output from uSDHC to eMMC

8-bit input from eMMC to uSDHC

SD8

SD7

SD6

SD4/SD5

SD2

SD3

SD1

Figure 31. HS200 Mode Timing

Table 55. HS200 Interface Timing Specification

ID

Parameter

Symbols

Min

Max

Unit

Card Input Clock

SD1

Clock Frequency Period

tCLK

5.0

—

ns

SD2

Clock Low Time

tCL

0.46 × tCLK

0.54 × tCLK

ns

SD2

Clock High Time

tCH

0.46 × tCLK

0.54 × tCLK

ns

uSDHC Output/Card Inputs SD_CMD, SDx_DATAx in HS200 (Reference to CLK)

SD5

uSDHC Output Delay

tOD

–1.6

1

ns

uSDHC Input/Card Outputs SD_CMD, SDx_DATAx in HS200 (Reference to CLK)1

SD8

Card Output Data Window

tODW

0.5*tCLK

—

ns

1. HS200 is for 8 bits while SDR104 is for 4 bits.

3.10.3.5 SDR50/SDR104 AC Timing

The following figure depicts the timing of SDR50/SDR104, and Table 56 lists the

SDR50/SDR104 timing characteristics.

Electrical characteristics

66

i.MX 8XLite Industrial Applications Processors, Rev. 3, 08/2023

NXP Semiconductors

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