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I.MX8XLITE Datasheet(PDF) 69 Page - NXP Semiconductors |
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I.MX8XLITE Datasheet(HTML) 69 Page - NXP Semiconductors |
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69 / 112 page ![]() Figure 33. RGMII timing diagram—No-Internal-Delay mode Table 58. RGMII timings—No-Internal-Delay mode ID Parameter Min Typ Max Unit TXC / RXC frequency — 125 — MHz t1 Clock cycle 7.2 8 8.8 ns t2 Data to clock output skew -500 — 500 ps t3 Data to clock input skew 1 1 — 2.6 ns 1. This implies that PC board design requires clocks to be routed such that an additional trace delay of greater than 1.5 ns and less than 2.0 ns is added to the associated clock signal. 3.10.4.1.2 Internal-delay mode This mode corresponds to RGMIIv2.0 specification. Electrical characteristics i.MX 8XLite Industrial Applications Processors, Rev. 3, 08/2023 69 NXP Semiconductors |
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