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I.MX8XLITE Datasheet(PDF) 71 Page - NXP Semiconductors |
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I.MX8XLITE Datasheet(HTML) 71 Page - NXP Semiconductors |
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71 / 112 page ![]() Figure 35. RMII timing diagram Timings in table below are covering both cases: reference clock generated internally or externally. Table 60. RMII timing ID Parameter Min Typ Max Unit t1 Reference clock — 50 — MHz Reference clock accuracy — — 50 ppm Reference clock duty-cycle 35 — 65 % t2 RMII_TXEN, RMII_TXD output delay 2 — 12 ns t3 RMII_CRS_DV, RMII_RXD setup time 4 — — ns t4 RMII_CRS_DV, RMII_RXD hold time 2 — — ns 3.10.4.3 MDIO MDIO is the control link used to configure Ethernet PHY connected to i.MX8 device. Electrical characteristics i.MX 8XLite Industrial Applications Processors, Rev. 3, 08/2023 71 NXP Semiconductors |
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