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I.MX8XLITE Datasheet(PDF) 92 Page - NXP Semiconductors |
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I.MX8XLITE Datasheet(HTML) 92 Page - NXP Semiconductors |
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92 / 112 page ![]() 4 Boot mode configuration This section provides information on boot mode configuration pins allocation and boot devices interfaces allocation. 4.1 Boot mode configuration pins The following table provides boot options, functionality, fuse values, and associated pins. Several input pins are also sampled at reset and can be used to override fuse values, depending on the value of FORCE_BOOT_FROM_FUSE. After it is blown, the Boot mode pin is ignored by ROM. ROM receives 'boot mode' from the BT_MODE_FUSES fuse. The boot option pins are in effect when BT_FUSE_SEL fuse is ‘0’ (cleared, which is the case for an unblown fuse). For detailed boot mode options configured by the Boot mode pins, see the System Boot, Fusemap, and OCOTP chapters of the device reference manual. Table 84. Fuse and associated pins used for Boot Interface IP Instance Allocated Pads During Boot Comment BOOT_MODE[0] Input SCU_BOOT_MODE0 Boot mode selection BOOT_MODE[1] Input SCU_BOOT_MODE1 BOOT_MODE[2] Input SCU_BOOT_MODE2 4.2 Boot devices interfaces allocation The following table lists the interfaces that can be used by the boot process in accordance with the specific Boot mode configuration. The table also describes the interface’s specific modes and IOMUXC allocation, which are configured during boot when appropriate. Boot mode configuration 92 i.MX 8XLite Industrial Applications Processors, Rev. 3, 08/2023 NXP Semiconductors |
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