AT89C51CC03U-RDTIM datasheet(183/197 Pages) ATMEL

183 / 197 page

183

AT89C51CC03

4182K–CAN–05/06

Timings

Test conditions: capacitive load on all pins= 60 pF.

Note:

1. Value of this parameter depends on prescacler ratio defined in bits 0,1 and 7 of SCON Register.In the above table, the ratio

used is 4. As it can be set also to 8, 16, 32, 64 or 128, the factor of T

PER must be changed according to the new ratio.E.g.

2TPER-20ns(1)

will be changed to 4TPER-20ns(1) if the prescaler ratio equals 8.

Table 1. SPI Interface Master AC Timing

DD = 2.7 to 3.3 V, TA = -40 to +85°C

Symbol

Parameter

Min

Max

Unit

Slave Mode

TCHCH

Clock Period

6(1)

TPER

TCHCX

Clock High Time

3(1)

TPER

TCLCX

Clock Low Time

3(1)

TPER

TSLCH, TSLCL

SS Low to Clock edge

4TPER-20ns

(1)

TIVCL, TIVCH

Input Data Valid to Clock Edge

TCLIX, TCHIX

Input Data Hold after Clock Edge

TCLOV, TCHOV

Output Data Valid after Clock Edge

TCLOX, TCHOX

Output Data Hold Time after Clock Edge

TCLSH, TCHSH

SS High after Clock Edge

4TPER+20ns

(1)

TSLOV

SS Low to Output Data Valid

4TPER+20ns

(1)

TSHOX

Output Data Hold after SS High

2TPER+100ns

(1)

TSHSL

SS High to SS Low

2TPER+120ns

(1)

TOLOH

Output Rise time

100

TOHOL

Output Fall Time

100

Master Mode

TCHCH

Clock Period

4(1)

TPER

TCHCX

Clock High Time

2TPER-20ns

(1)

TPER

TCLCX

Clock Low Time

2TPER-20ns

(1)

TPER

TIVCL, TIVCH

Input Data Valid to Clock Edge

TCLIX, TCHIX

Input Data Hold after Clock Edge

TCLOV, TCHOV

Output Data Valid after Clock Edge

TCLOX, TCHOX

Output Data Hold Time after Clock Edge

TCLCH

Output Data Rise time

100

TCHCL

Output Data Fall Time

100

AT89C51CC03U-RDTIM Datasheet(PDF) 183 Page - ATMEL Corporation

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