ST7LITE49M datasheet(126/188 Pages) STMICROELECTRONICS

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On-chip peripherals

ST7LITE49M

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I2C Own Address register (OAR1)

Reset value: 0000 0000 (00h)

●

In 7-bit addressing mode

Bit 7:1 = ADD[7:1] Interface address. These bits define the I2C bus address of the

interface. They are not cleared when the interface is disabled (PE=0).

Bit 0 = ADD0 Address direction bit.

This bit is don’t care, the interface acknowledges either 0 or 1. It is not cleared when

the interface is disabled (PE=0).

Note:

Address 01h is always ignored.

●

In 10-bit addressing mode

Bit 7:0 = ADD[7:0] Interface address. These are the least significant bits of the I2C bus

address of the interface. They are not cleared when the interface is disabled (PE=0).

I2C Own Address register (OAR2)

Reset value: 0100 0000 (40h)

Bit 7:6 = FR[1:0] Frequency bits

These bits are set by software only when the interface is disabled (PE=0). To configure

the interface to I2C specified delays select the value corresponding to the

microcontroller frequency fCPU.

Bit 5:3 = Reserved

Bit 2:1 = ADD[9:8] Interface address

These are the most significant bits of the I2C bus address of the interface (10-bit mode

only). They are not cleared when the interface is disabled (PE=0).

Bit 0 = Reserved.

ADD7

ADD6

ADD5

ADD4

ADD3

ADD2

ADD1

ADD0

Read / Write

FR1

FR0

ADD9

ADD8

Read / Write

Table 51.

Configuration of I2C delay times

fCPU

FR1

FR0

< 6 MHz

6 to 8 MHz

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