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DSPIC33FJ12MC02ESS Datasheet(PDF) 254 Page - Microchip Technology |
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DSPIC33FJ12MC02ESS Datasheet(HTML) 254 Page - Microchip Technology |
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254 / 284 page ![]() dsPIC33FJ12MC201/202 DS70265B-page 252 Preliminary © 2007 Microchip Technology Inc. FIGURE 23-14: SPIx MODULE MASTER MODE (CKE = 0) TIMING CHARACTERISTICS SCKx (CKP = 0) SCKx (CKP = 1) SDOx SDIx SP11 SP10 SP40 SP41 SP21 SP20 SP35 SP20 SP21 MSb LSb Bit 14 - - - - - -1 MSb In LSb In Bit 14 - - - -1 SP30 SP31 Note: Refer to Figure 23-1 for load conditions. TABLE 23-32: SPIx MASTER MODE (CKE = 0) TIMING REQUIREMENTS AC CHARACTERISTICS Standard Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for Industrial -40°C ≤ TA ≤ +125°C for Extended Param No. Symbol Characteristic(1) Min Typ(2) Max Units Conditions SP10 TscL SCKx Output Low Time TCY/2 — — ns See Note 3 SP11 TscH SCKx Output High Time TCY/2 — — ns See Note 3 SP20 TscF SCKx Output Fall Time — — — ns See parameter D032 and Note 4 SP21 TscR SCKx Output Rise Time — — — ns See parameter D031 and Note 4 SP30 TdoF SDOx Data Output Fall Time — — — ns See parameter D032 and Note 4 SP31 TdoR SDOx Data Output Rise Time — — — ns See parameter D031 and Note 4 SP35 TscH2doV, TscL2doV SDOx Data Output Valid after SCKx Edge — 6 20 ns — SP40 TdiV2scH, TdiV2scL Setup Time of SDIx Data Input to SCKx Edge 23 — — ns — SP41 TscH2diL, TscL2diL Hold Time of SDIx Data Input to SCKx Edge 30 — — ns — Note 1: These parameters are characterized but not tested in manufacturing. 2: Data in “Typ” column is at 3.3V, 25°C unless otherwise stated. 3: The minimum clock period for SCKx is 100 ns. Therefore, the clock generated in Master mode must not violate this specification. 4: Assumes 50 pF load on all SPIx pins. |
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