PIC18F44J10-ESLASHML datasheet(313/358 Pages) MICROCHIP

313 / 358 page

Preliminary

DS39682C-page 311

PIC18F45J10 FAMILY

23.4.3

TIMING DIAGRAMS AND SPECIFICATIONS

FIGURE 23-4:

EXTERNAL CLOCK TIMING (ALL MODES EXCEPT PLL)

TABLE 23-6:

EXTERNAL CLOCK TIMING REQUIREMENTS

OSC1

CLKO

Param.

No.

Symbol

Characteristic

Min

Max

Units

Conditions

FOSC

External CLKI Frequency(1)

MHz

EC Oscillator mode

Oscillator Frequency(1)

MHz

HS Oscillator mode

1TOSC

External CLKI Period(1)

—

EC Oscillator mode

Oscillator Period(1)

250

HS Oscillator mode

2TCY

Instruction Cycle Time(1)

100

—

TCY = 4/FOSC, Industrial

3TOSL,

TOSH

External Clock in (OSC1)

High or Low Time

—

EC Oscillator mode

4TOSR,

TOSF

External Clock in (OSC1)

Rise or Fall Time

—

7.5

EC Oscillator mode

Note 1:

Instruction cycle period (TCY) equals four times the input oscillator time base period for all configurations.

All specified values are based on characterization data for that particular oscillator type under standard

operating conditions with the device executing code. Exceeding these specified limits may result in an

unstable oscillator operation and/or higher than expected current consumption. All devices are tested to

operate at “min.” values with an external clock applied to the OSC1/CLKI pin. When an external clock input

is used, the “max.” cycle time limit is “DC” (no clock) for all devices.

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