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PIC18F4685-I/SP Datasheet(PDF) 273 Page - Microchip Technology |
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PIC18F4685-I/SP Datasheet(HTML) 273 Page - Microchip Technology |
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273 / 484 page ![]() © 2007 Microchip Technology Inc. Preliminary DS39761B-page 271 PIC18F2682/2685/4682/4685 22.6 Operation During Sleep When enabled, the HLVD circuitry continues to operate during Sleep. If the device voltage crosses the trip point, the HLVDIF bit will be set and the device will wake-up from Sleep. Device execution will continue from the interrupt vector address if interrupts have been globally enabled. 22.7 Effects of a Reset A device Reset forces all registers to their Reset state. This forces the HLVD module to be turned off. TABLE 22-1: REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset Values on Page HLVDCON VDIRMAG — IRVST HLVDEN HLVDL3 HLVDL2 HLVDL1 HLVDL0 50 INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 49 PIR2 OSCFIF CMIF(1) — EEIF BCLIF HLVDIF TMR3IF ECCP1IF(1) 52 PIE2 OSCFIE CMIE(1) — EEIE BCLIE HLVDIE TMR3IE ECCP1IE(1) 52 IPR2 OSCFIP CMIP(1) — EEIP BCLIP HLVDIP TMR3IP ECCP1IP(1) 51 Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the HLVD module. Note 1: These bits are available in PIC18F4682/4685 devices and reserved in PIC18F2682/2685 devices. |
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