PIC18F4685-ISLASHSP datasheet(177/484 Pages) MICROCHIP

177 / 484 page

Preliminary

DS39761B-page 175

PIC18F2682/2685/4682/4685

16.4

Enhanced PWM Mode

The Enhanced PWM mode provides additional PWM

output options for a broader range of control applica-

tions. The module is a backward compatible version of

the standard CCP1 module and offers up to four outputs,

designated P1A through P1D. Users are also able to

select the polarity of the signal (either active-high or

active-low). The module’s output mode and polarity are

configured by setting the EPWM1M1:EPWM1M0 and

ECCP1M3:ECCP1M0 bits of the ECCP1CON register.

Figure 16-1 shows a simplified block diagram of PWM

operation. All control registers are double-buffered and

are loaded at the beginning of a new PWM cycle (the

period boundary when Timer2 resets) in order to

prevent glitches on any of the outputs. The exception is

the PWM Dead-Band Delay register, ECCP1DEL,

which is loaded at either the duty cycle boundary or the

boundary period (whichever comes first). Because of

the buffering, the module waits until the assigned timer

resets instead of starting immediately. This means that

Enhanced PWM waveforms do not exactly match the

standard PWM waveforms, but are instead offset by

one full instruction cycle (4 TOSC).

As before, the user must manually configure the

appropriate TRIS bits for output.

16.4.1

PWM PERIOD

The PWM period is specified by writing to the PR2

following equation.

EQUATION 16-1:

PWM frequency is defined as 1/[PWM period]. When

TMR2 is equal to PR2, the following three events occur

on the next increment cycle:

•TMR2 is cleared

• The ECCP1 pin is set (if PWM duty cycle = 0%,

the ECCP1 pin will not be set)

• The PWM duty cycle is copied from ECCPR1L

into ECCPR1H

FIGURE 16-1:

SIMPLIFIED BLOCK DIAGRAM OF THE ENHANCED PWM MODULE

Note:

The Timer2 postscaler (see Section 13.0

“Timer2 Module”) is not used in the

determination of the PWM frequency. The

postscaler could be used to have a servo

update rate at a different frequency than

the PWM output.

PWM Period =

[(PR2) + 1] • 4 • TOSC •

(TMR2 Prescale Value)

ECCPR1L

ECCPR1H (Slave)

Comparator

TMR2

Comparator

PR2

(Note 1)

Duty Cycle Registers

ECCP1CON<5:4>

Clear Timer,

set ECCP1 pin and

latch D.C.

Note: The 8-bit TMR2 register is concatenated with the 2-bit internal Q clock, or 2 bits of the prescaler, to create the 10-bit time base.

TRISD<4>

ECCP1/P1A

TRISD<5>

P1B

TRISD<6>

TRISD<7>

P1D

Output

Controller

EPWM1M<1:0>

ECCP1M<3:0>

ECCP1DEL

ECCP1/P1A

P1B

P1C

P1D

P1C

PIC18F4685-I/SP Datasheet(PDF) 177 Page - Microchip Technology

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