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PIC16F610-E/MLQTP Datasheet(PDF) 105 Page - Microchip Technology |
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PIC16F610-E/MLQTP Datasheet(HTML) 105 Page - Microchip Technology |
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105 / 180 page ![]() © 2007 Microchip Technology Inc. Preliminary DS41288C-page 103 PIC16F610/616/16HV610/616 TABLE 10-7: SUMMARY OF REGISTERS ASSOCIATED WITH PWM REGISTER 10-3: PWM1CON: ENHANCED PWM CONTROL REGISTER R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 PRSEN PDC6 PDC5 PDC4 PDC3 PDC2 PDC1 PDC0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7 PRSEN: PWM Restart Enable bit 1 = Upon auto-shutdown, the ECCPASE bit clears automatically once the shutdown event goes away; the PWM restarts automatically 0 = Upon auto-shutdown, ECCPASE must be cleared in software to restart the PWM bit 6-0 PDC<6:0>: PWM Delay Count bits PDCn = Number of FOSC/4 (4 * TOSC) cycles between the scheduled time when a PWM signal should transition active and the actual time it transitions active Name Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0 Value on POR, BOR Value on all other Resets CCP1CON(1) P1M1 P1M0 DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 0000 0000 0000 0000 CCPR1L(1) Capture/Compare/PWM Register 1 Low Byte xxxx xxxx uuuu uuuu CCPR1H(1) Capture/Compare/PWM Register 1 High Byte xxxx xxxx uuuu uuuu CM1CON0 C1ON C1OUT C1OE C1POL — C1R C1CH1 C1CH0 0000 -000 0000 -000 CM2CON0 C2ON C2OUT C2OE C2POL — C2R C2CH1 C2CH0 0000 -000 0000 -000 CM2CON1 MC1OUT MC2OUT — T1ACS C1HYS C2HYS T1GSS C2SYNC 00-0 0010 00-0 0010 ECCPAS(1) ECCPASE ECCPAS2 ECCPAS1 ECCPAS0 PSSAC1 PSSAC0 PSSBD1 PSSBD0 0000 0000 0000 0000 INTCON GIE PEIE T0IE INTE RAIE T0IF INTF RAIF 0000 0000 0000 0000 PIE1 — ADIE(1) CCP1IE(1) C2IE C1IE —TMR2IE(1) TMR1IE -000 0-00 0000 0-00 PIR1 — ADIF(1) CCP1IF(1) C2IF C1IF —TMR2IF(1) TMR1IF -000 0-00 0000 0-00 PWM1CON(1) PRSEN PDC6 PDC5 PDC4 PDC3 PDC2 PDC1 PDC0 0000 0000 0000 0000 T2CON(1) — TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000 TMR2(1) Timer2 Module Register 0000 0000 0000 0000 TRISA — — TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 --11 1111 --11 1111 TRISC — — TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 --11 1111 --11 1111 Legend: – = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the Capture, Compare and PWM. Note 1: PIC16F616/16HV616 only. |
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