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PIC24HJ12GP201E/ML Datasheet(PDF) 163 Page - Microchip Technology |
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PIC24HJ12GP201E/ML Datasheet(HTML) 163 Page - Microchip Technology |
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163 / 234 page  © 2007 Microchip Technology Inc. Preliminary DS70282B-page 161 PIC24HJ12GP201/202 REGISTER 17-6: AD1CSSL: ADC1 INPUT SCAN SELECT REGISTER LOW(1,2) U-0 U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 — — — — — — CSS9 CSS8 bit 15 bit 8 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 CSS7 CSS6 CSS5 CSS4 CSS3 CSS2 CSS1 CSS0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-10 Unimplemented: Read as ‘0’ bit 9-0 CSS<9:0>: ADC Input Scan Selection bits 1 = Select ANx for input scan 0 = Skip ANx for input scan Note 1: On devices without nine analog inputs, all AD1CSSL bits can be selected. However, inputs selected for scan without a corresponding input on device will convert ADREF-. 2: PIC24HJ12GP201 devices support only 6 channels (CSS0-CSS5). REGISTER 17-7: AD1PCFGL: ADC1 PORT CONFIGURATION REGISTER LOW(1,2) U-0 U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 — — — — — —PCFG9 PCFG8 bit 15 bit 8 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 PCFG7 PCFG6 PCFG5 PCFG4 PCFG3 PCFG2 PCFG1 PCFG0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-10 Unimplemented: Read as ‘0’ bit 9-0 PCFG<9:0>: ADC Port Configuration Control bits 1 = Port pin in Digital mode, port read input enabled, ADC input multiplexer connected to AVSS 0 = Port pin in Analog mode, port read input disabled, ADC samples pin voltage Note 1: On devices without nine analog inputs, all PCFG bits are R/W. However, PCFG bits are ignored on ports without a corresponding input on device. 2: PIC24HJ12GP201 devices support only 6 channels (PCFG0-PCFG5). |
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