PIC18F23K20-ESLASHML datasheet(145/420 Pages) MICROCHIP

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Advance Information

DS41303B-page 143

PIC18F2XK20/4XK20

12.2

Timer1 16-Bit Read/Write Mode

Timer1 can be configured for 16-bit reads and writes

(see Figure 12-2). When the RD16 control bit of the

T1CON register is set, the address for TMR1H is

mapped to a buffer register for the high byte of Timer1.

A read from TMR1L will load the contents of the high

byte of Timer1 into the Timer1 high byte buffer. This

provides the user with the ability to accurately read all

16 bits of Timer1 without the need to determine

whether a read of the high byte, followed by a read of

the low byte, has become invalid due to a rollover or

carry between reads.

Writing to TMR1H does not directly affect Timer1.

Instead, the high byte of Timer1 is updated with the

contents of TMR1H when a write occurs to TMR1L.

This allows all 16 bits of Timer1 to be updated at once.

The high byte of Timer1 is not directly readable or

writable in this mode. All reads and writes must take

place through the Timer1 High Byte Buffer register.

Writes to TMR1H do not clear the Timer1 prescaler.

The prescaler is only cleared on writes to TMR1L.

12.3

Timer1 Oscillator

An on-chip crystal oscillator circuit is incorporated

between pins T1OSI (input) and T1OSO (amplifier

output). It is enabled by setting the Timer1 Oscillator

Enable bit, T1OSCEN of the T1CON register. The

oscillator is a low-power circuit rated for 32 kHz crystals.

It will continue to run during all power-managed modes.

The circuit for a typical LP oscillator is shown in

Figure 12-3. Table 12-1 shows the capacitor selection

for the Timer1 oscillator.

The user must provide a software time delay to ensure

proper start-up of the Timer1 oscillator.

FIGURE 12-3:

EXTERNAL

COMPONENTS FOR THE

TIMER1 LP OSCILLATOR

TABLE 12-1:

CAPACITOR SELECTION FOR

THE TIMER OSCILLATOR

12.3.1

USING TIMER1 AS A

CLOCK SOURCE

The Timer1 oscillator is also available as a clock source

in power-managed modes. By setting the clock select

bits, SCS<1:0> of the OSCCON register, to ‘01’, the

device switches to SEC_RUN mode; both the CPU and

peripherals are clocked from the Timer1 oscillator. If the

IDLEN bit of the OSCCON register is cleared and a

SLEEP

instruction is executed, the device enters

SEC_IDLE mode. Additional details are available in

Section 3.0 “Power-Managed Modes”.

Whenever the Timer1 oscillator is providing the clock

source, the Timer1 system clock status flag, T1RUN of

the T1CON register, is set. This can be used to deter-

mine the controller’s current clocking mode. It can also

indicate which clock source is currently being used by

the Fail-Safe Clock Monitor. If the Clock Monitor is

enabled and the Timer1 oscillator fails while providing

the clock, polling the T1RUN bit will indicate whether

the clock is being provided by the Timer1 oscillator or

another source.

Note:

See the Notes with Table 12-1 for additional

information about capacitor selection.

XTAL

T1OSI

T1OSO

32.768 kHz

27 pF

PIC® MCU

Osc Type

Freq

32 kHz

27 pF(1)

Note 1: Microchip suggests these values only as a

starting point in validating the oscillator

circuit.

2: Higher capacitance increases the stability

of the oscillator but also increases the

start-up time.

3: Since each resonator/crystal has its own

characteristics, the user should consult

the resonator/crystal manufacturer for

appropriate values of external

components.

4: Capacitor values are for design guidance

only.

PIC18F23K20-E/ML Datasheet(PDF) 145 Page - Microchip Technology

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