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PIC18F258-E/LSQTP Datasheet(PDF) 204 Page - Microchip Technology |
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PIC18F258-E/LSQTP Datasheet(HTML) 204 Page - Microchip Technology |
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204 / 402 page ![]() PIC18FXX8 DS41159E-page 202 © 2006 Microchip Technology Inc. REGISTER 19-2: CANSTAT: CAN STATUS REGISTER R-1 R-0 R-0 U-0 R-0 R-0 R-0 U-0 OPMODE2 OPMODE1 OPMODE0 — ICODE2 ICODE1 ICODE0 — bit 7 bit 0 bit 7-5 OPMODE2:OPMODE0: Operation Mode Status bits 111 = Reserved 110 = Reserved 101 = Reserved 100 = Configuration mode 011 = Listen Only mode 010 = Loopback mode 001 = Disable mode 000 = Normal mode Note: Before the device goes into Sleep mode, select Disable mode. bit 4 Unimplemented: Read as ‘0’ bit 3-1 ICODE2:ICODE0: Interrupt Code bits When an interrupt occurs, a prioritized coded interrupt value will be present in the ICODE2:ICODE0 bits. These codes indicate the source of the interrupt. The ICODE2:ICODE0 bits can be copied to the WIN2:WIN0 bits to select the correct buffer to map into the Access Bank area. See Example 19-1 for code example. 111 = Wake-up on interrupt 110 = RXB0 interrupt 101 = RXB1 interrupt 100 = TXB0 interrupt 011 = TXB1 interrupt 010 = TXB2 interrupt 001 = Error interrupt 000 = No interrupt bit 0 Unimplemented: Read as ‘0’ Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown |
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