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PIC18F258-E/LSQTP Datasheet(PDF) 229 Page - Microchip Technology |
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PIC18F258-E/LSQTP Datasheet(HTML) 229 Page - Microchip Technology |
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229 / 402 page ![]() © 2006 Microchip Technology Inc. DS41159E-page 227 PIC18FXX8 19.3.5 LOOPBACK MODE This mode will allow internal transmission of messages from the transmit buffers to the receive buffers without actually transmitting messages on the CAN bus. This mode can be used in system development and testing. In this mode, the ACK bit is ignored and the device will allow incoming messages from itself, just as if they were coming from another node. The Loopback mode is a silent mode, meaning no messages will be trans- mitted while in this state, including error flags or Acknowledge signals. The TXCAN pin will revert to port I/O while the device is in this mode. The filters and masks can be used to allow only particular messages to be loaded into the receive registers. The masks can be set to all zeros to provide a mode that accepts all messages. The Loopback mode is activated by setting the mode request bits in the CANCON register. 19.3.6 ERROR RECOGNITION MODE The module can be set to ignore all errors and receive all message. The Error Recognition mode is activated by setting the RXM<1:0> bits in the RXBnCON registers to ‘11’. In this mode, all messages, valid or invalid, are received and copied to the receive buffer. 19.4 CAN Message Transmission 19.4.1 TRANSMIT BUFFERS The PIC18FXX8 implements three transmit buffers (Figure 19-2). Each of these buffers occupies 14 bytes of SRAM and are mapped into the device memory map. For the MCU to have write access to the message buffer, the TXREQ bit must be clear, indicating that the message buffer is clear of any pending message to be transmitted. At a minimum, the TXBnSIDH, TXBnSIDL and TXBnDLC registers must be loaded. If data bytes are present in the message, the TXBnDm registers must also be loaded. If the message is to use extended identifiers, the TXBnEIDm registers must also be loaded and the EXIDE bit set. Prior to sending the message, the MCU must initialize the TXInE bit to enable or disable the generation of an interrupt when the message is sent. The MCU must also initialize the TXP priority bits (see Section 19.4.2 “Transmit Priority”). 19.4.2 TRANSMIT PRIORITY Transmit priority is a prioritization within the PIC18FXX8 of the pending transmittable messages. This is independent from and not related to any prioriti- zation implicit in the message arbitration scheme built into the CAN protocol. Prior to sending the SOF, the priority of all buffers that are queued for transmission is compared. The transmit buffer with the highest priority will be sent first. If two buffers have the same priority setting, the buffer with the highest buffer number will be sent first. There are four levels of transmit priority. If TXP bits for a particular message buffer are set to ‘11’, that buffer has the highest possible priority. If TXP bits for a particular message buffer are ‘00’, that buffer has the lowest possible priority. FIGURE 19-2: TRANSMIT BUFFER BLOCK DIAGRAM Message Queue Control Transmit Byte Sequencer TXREQ TXB0 TXABT TXLARB TXERR TXBUFF MESSAGE TXREQ TXB1 TXABT TXLARB TXERR TXBUFF MESSAGE TXREQ TXB2 TXABT TXLARB TXERR TXBUFF MESSAGE Message Request |
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