PIC18F258-ESLASHLSQTP datasheet(292/402 Pages) MICROCHIP

292 / 402 page

PIC18FXX8

DS41159E-page 290

BCF

Bit Clear f

Syntax:

[

label ] BCF

f,b[,a]

Operands:

≤ f ≤ 255

≤ b ≤ 7

∈ [0,1]

Operation:

→ f<b>

Status Affected:

None

Encoding:

1001

bbba

ffff

Description:

Bit ‘b’ in register ‘f’ is cleared. If ‘a’ is ‘0’,

the Access Bank will be selected, over-

riding the BSR value. If ‘a’ = 1, then the

bank will be selected as per the BSR

value (default).

Words:

Cycles:

Q Cycle Activity:

Decode

Read

Process

Data

Write

Example:

BCF

FLAG_REG, 7

Before Instruction

FLAG_REG = 0xC7

After Instruction

FLAG_REG = 0x47

Branch if Negative

Syntax:

[

label ] BN

Operands:

-128

≤ n ≤ 127

Operation:

if Negative bit is ‘1’

(PC) + 2 + 2n

→ PC

Status Affected:

None

Encoding:

1110

0110

nnnn

Description:

If the Negative bit is ‘1’, then the

program will branch.

The 2’s complement number ‘2n’ is

added to the PC. Since the PC will have

incremented to fetch the next instruc-

tion, the new address will be

PC + 2 + 2n. This instruction is then a

two-cycle instruction.

Words:

Cycles:

1(2)

Q Cycle Activity:

If Jump:

Decode

Read literal

‘n’

Process

Data

Write to PC

operation

If No Jump:

Decode

Read literal

‘n’

Process

Data

operation

Example:

HERE

Jump

Before Instruction

address (HERE)

After Instruction

If Negative

address (Jump)

If Negative

address (HERE + 2)

PIC18F258-E/LSQTP Datasheet(PDF) 292 Page - Microchip Technology

PIC18F258-E/LSQTP Datasheet(HTML) 292 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL